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Dual PCI Express, Hot-Plug
Controller
18   ______________________________________________________________________________________
N
Y
POWER-ON MAIN
SUPPLIES FAULT
AND PWRGD ARE
HIGH IMPEDANCE
N
ENABLE CHARGE ON
12G_ AND 3.3G_
PINS. START
COUNTING t
SU
HAS t
SU
 
ELAPSED?
N
POWER-ON AUXILIARY
SUPPLIES FAULT
AND PWRGD ARE
HIGH IMPEDANCE
N
ENABLE CHARGE ON
INTERNAL AUXILIARY
MOSFET, BEGIN
COUNTING t
SU
HAS t
SU
 ELAPSED?
N
Y
N
Y
Y
ARE PWRGD
THRESHOLDS
REACHED?
ASSERT
 PWRGD_
AFTER t
POR_HL
 DELAY
12V AND 3.3V
OUTPUTS
ARE ENABLED
WAS CURRENT
LIMIT DETECTED ON ANY
12V OR
3.3V OUTPUT?
START COUNTING
t
FAULT
HAS t
FAULT
ELAPSED?
N
Y
RESET t
FAULT
COUNTER
Y
SHUT DOWN
12V AND 3.3V OUTPUTS.
ASSERT FAULT_
STAY WAITING FOR
t
RESTART
LATCH-OFF
OPTION?
Y
STAY WAITING FOR
ON_ TRANSITION
HIGH->LOW->HIGH
AUX SUPPLY OUTPUT
IS ENABLED
WAS CURRENT LIMIT
DETECTED ON AUXILIARY
OUTPUT?
IS t
FAULT
ELAPSED?
N
N
Y
Y
SHUT DOWN
ALL OUTPUTS,
ASSERT FAULT_,
STAY WAITING FOR
t
RESTART
 ELAPSED.
LATCH-OFF
OPTION?
Y
RESET FAULT_
AND
RESTART ALL SUPPLIES
STAY WAITING FOR BOTH
ON_ AND AUXON_
TRANSITION
HIGH->LOW->HIGH
RESET FAULT_
AND
RESTART 12V, 3.3V
SUPPLIES
IS FAULT STILL
PRESENT?
Y
N
IS FAULT STILL
PRESENT?
N
START COUNTING
t
FAULT
RESET tFAULT
COUNTER
RESET
 PWRGD_
AFTER t
POR_LH
 DELAY
3.3AUXIN IS ON
AND ABOVE UVLO
Figure 6. Fault Management Flow Chart
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